| 2009 |
31 | | Anna Bernasconi,
Valentina Ciriani,
Gabriella Trucco,
Tiziano Villa:
On decomposing Boolean functions via extended cofactoring.
DATE 2009: 1464-1469 |
30 | | Valentina Ciriani,
Sabrina De Capitani di Vimercati,
Sara Foresti,
Sushil Jajodia,
Stefano Paraboschi,
Pierangela Samarati:
Enforcing Confidentiality Constraints on Sensitive Databases with Lightweight Trusted Clients.
DBSec 2009: 225-239 |
29 | | Anna Bernasconi,
Valentina Ciriani,
Gabriella Trucco,
Tiziano Villa:
Logic Minimization and Testability of 2SPP-P-Circuits.
DSD 2009: 773-780 |
28 | | Valentina Ciriani,
Sabrina De Capitani di Vimercati,
Sara Foresti,
Sushil Jajodia,
Stefano Paraboschi,
Pierangela Samarati:
Keep a Few: Outsourcing Data While Maintaining Confidentiality.
ESORICS 2009: 440-455 |
27 | | Valentina Ciriani,
Sabrina De Capitani di Vimercati,
Sara Foresti,
Sushil Jajodia,
Stefano Paraboschi,
Pierangela Samarati:
Fragmentation Design for Efficient Query Execution over Sensitive Distributed Databases.
ICDCS 2009: 32-39 |
| 2008 |
26 | | Anna Bernasconi,
Valentina Ciriani,
Roberto Cordone:
On Projecting Sums of Products.
DSD 2008: 787-794 |
25 | | Giorgio Boselli,
Valentina Ciriani,
Valentino Liberali,
Gabriella Trucco:
A Comparison between Two Logic Synthesis Forms from Digital Switching Noise Viewpoint.
PATMOS 2008: 237-246 |
24 | | Anna Bernasconi,
Valentina Ciriani,
Roberto Cordone:
The optimization of kEP-SOPs: Computational complexity, approximability and experiments.
ACM Trans. Design Autom. Electr. Syst. 13(2): (2008) |
23 | | Anna Bernasconi,
Valentina Ciriani,
Rolf Drechsler,
Tiziano Villa:
Logic Minimization and Testability of 2-SPP Networks.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1190-1202 (2008) |
22 | | Görschwin Fey,
Anna Bernasconi,
Valentina Ciriani,
Rolf Drechsler:
On the construction of small fully testable circuits with low depth.
Microprocessors and Microsystems - Embedded Hardware Design 32(5-6): 263-269 (2008) |
21 | | Anna Bernasconi,
Valentina Ciriani,
Fabrizio Luccio,
Linda Pagli:
Synthesis of Autosymmetric Functions in a New Three-Level Form.
Theory Comput. Syst. 42(4): 450-464 (2008) |
| 2007 |
20 | | Anna Bernasconi,
Valentina Ciriani,
Roberto Cordone:
An approximation algorithm for fully testable kEP-SOP networks.
ACM Great Lakes Symposium on VLSI 2007: 417-422 |
19 | | Görschwin Fey,
Anna Bernasconi,
Valentina Ciriani,
Rolf Drechsler:
On the Construction of Small Fully Testable Circuits with Low Depth.
DSD 2007: 563-569 |
18 | | Valentina Ciriani,
Sabrina De Capitani di Vimercati,
Sara Foresti,
Sushil Jajodia,
Stefano Paraboschi,
Pierangela Samarati:
Fragmentation and Encryption to Enforce Privacy in Data Storage.
ESORICS 2007: 171-186 |
17 | | Valentina Ciriani,
Sabrina De Capitani di Vimercati,
Sara Foresti,
Pierangela Samarati:
Microdata Protection.
Secure Data Management in Decentralized Systems 2007: 291-321 |
16 | | Valentina Ciriani,
Sabrina De Capitani di Vimercati,
Sara Foresti,
Pierangela Samarati:
k-Anonymity.
Secure Data Management in Decentralized Systems 2007: 323-353 |
15 | | Valentina Ciriani,
Paolo Ferragina,
Fabrizio Luccio,
S. Muthukrishnan:
A data structure for a sequence of string accesses in external memory.
ACM Transactions on Algorithms 3(1): (2007) |
| 2006 |
14 | | Anna Bernasconi,
Valentina Ciriani,
Rolf Drechsler,
Tiziano Villa:
Efficient minimization of fully testable 2-SPP networks.
DATE 2006: 1300-1305 |
13 | | Anna Bernasconi,
Valentina Ciriani:
DRedSOP: Synthesis of a New Class of Regular Functions.
DSD 2006: 377-384 |
12 | | Anna Bernasconi,
Valentina Ciriani,
Roberto Cordone:
EXOR Projected Sum of Products.
VLSI-SoC 2006: 284-289 |
11 | | Valentina Ciriani,
Anna Bernasconi,
Rolf Drechsler:
Testability of SPP Three-Level Logic Networks in Static Fault Models.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2241-2248 (2006) |
10 | | Anna Bernasconi,
Valentina Ciriani,
Fabrizio Luccio,
Linda Pagli:
Exploiting Regularities for Boolean Function Synthesis.
Theory Comput. Syst. 39(4): 485-501 (2006) |
| 2004 |
9 | | Valentina Ciriani,
Nadia Pisanti,
Anna Bernasconi:
Room allocation: a polynomial subcase of the quadratic assignment problem.
Discrete Applied Mathematics 144(3): 263-269 (2004) |
| 2003 |
8 | | Valentina Ciriani,
Anna Bernasconi,
Rolf Drechsler:
Testability of SPP Three-Level Logic Networks.
VLSI-SOC 2003: 331-336 |
7 | | Valentina Ciriani:
Synthesis of SPP three-level logic networks using affine spaces.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(10): 1310-1323 (2003) |
6 | | Anna Bernasconi,
Valentina Ciriani,
Fabrizio Luccio,
Linda Pagli:
Three-level logic minimization based on function regularities.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(8): 1005-1016 (2003) |
5 | | Valentina Ciriani,
Fabrizio Luccio,
Linda Pagli:
Synthesis of integer multipliers in sum of pseudoproducts form.
Integration 36(3): 103-119 (2003) |
| 2002 |
4 | | Anna Bernasconi,
Valentina Ciriani,
Fabrizio Luccio,
Linda Pagli:
Fast three-level logic minimization based on autosymmetry.
DAC 2002: 425-430 |
3 | | Valentina Ciriani,
Paolo Ferragina,
Fabrizio Luccio,
S. Muthukrishnan:
Static Optimality Theorem for External Memory String Access.
FOCS 2002: 219-227 |
2 | | Anna Bernasconi,
Valentina Ciriani,
Fabrizio Luccio,
Linda Pagli:
Implicit Test of Regularity for Not Completely Specified Boolean Functions.
IWLS 2002: 345-350 |
| 2001 |
1 | | Valentina Ciriani:
Logic Minimization using Exclusive OR Gates.
DAC 2001: 115-120 |