Hamming Tree: The Case for Memory-Aware Bit Flipping Reduction for NVM Indexing
Abstract
Non-Volatile Memory (NVM) is improving the performance and cost-efficiency of data management systems. However, they introduce salient challenges that were not considered in traditional memory architectures. In particular, write endurance in NVM is significantly lower than other memory technologies which threatens the practicality and longevity of NVM devices. In this paper, we introduce Hamming Tree, an indexing structure that can be augmented with existing database indexing technologies to increase the write endurance of NVM. Hamming Tree proposes a new way of increasing write endurance by directing write operations to memory locations that would minimize the number of incurred bit flips. This method is capable of significantly increasing the endurance of NVM compared to existing write endurance methods that remain agnostic to the underlying memory such as local write optimizations and write amplification techniques. Our evaluations show that Hamming Tree can reduce bit flipping (hence increasing write endurance) by up to %93 on both traditional and optimized NVM indexing technologies with minimal changes to their indexing structure.